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   Core Tile for ARM11 MPCore

Core Tile for ARM11 MPCore

This datasheet describes two new ARM® RealView® products: the Core Tile for ARM11 MPCore and the Emulation Baseboard. Together, these boards provide an ideal prototyping platform for designs based on the ARM11 MPCore processor and AMBA AXI interfaces.

Core Tile for ARM11 MPCore
The CT11MPCore is a compact development board based on the ARM11 MPCore test chip. This device incorporates four ARM11 MPCore processors, which can be used individually or together to evaluate ARM11 and ARM’s multiprocessing technology.

The multiprocessor test chip combines very high processing performance with flexibility to adapt its ower consumption to the performance requirements by turning off individual processors.

The ARM11 MPCore test chip has two AXI interfaces, which are routed to the Core Tile’s stacking connectors. The Core Tile has been designed to work on top of a baseboard that provides power and implements the memory system and peripherals.

The Core Tile includes ADC and DAC circuits to modify the core voltage and measure the current on the test chip’s power rails. This feature allows the test of power-saving modes and the measurement of power consumption with different software loads.

Emulation Baseboard

The Emulation Baseboard is a development board especially designed to prototype systems based on AMBA AXI and AHB bus interfaces.

The Emulation Baseboard provides a large amount of memory and peripherals typically used in embedded and wireless applications. The board is based on a large FPGA that normally implements the bus infrastructure, memory system and peripheral controllers, but which can also be used to synthesize small ARM processors.

Core Tiles and Logic Tiles can be stacked on top of the Emulation baseboard to implement hardened ARM processors and to provide more FPGA space to prototype custom peripherals.

In order to accelerate hardware and software development and reduce time to market the Emulation Baseboard is delivered with example RTL, FPGA bit files, and example software that works with all existing Core Tiles. A number of operating systems, including WinCE, Linux and Symbian, have been ported to this board to help users accelerate the development of OS-based applications.

Specification
Emulation Baseboard Features

  • 2 sites for Core Tiles, Logic Tiles or Interface Tiles
  •  Virtex-II XC2V6000 FPGA
  •  256MB DDR SDRAM and 2MB Cellular RAM
  •  64MB NOR Flash
  •  PISMO expansion site (www.pismoworld.org)
  •  JTAG connector
  •  In-built hardware to program the FPGAs and PLDs of
    the system with a USB cable
  •  Standard frequency: 30MHz AXI or AHB
  • Emulation Baseboard Peripherals

  • Ethernet, high speed USB and PCI
  • VGA output and connection to LCD panels
  • Keyboard and mouse connectors
  • Smartcard and Multimedia/SD Card
  • Stereo audio in/out and microphone
  • 4 UARTs and character LCD
  • Switches, LEDs and GPIO headers
  • CT11MPCore Features

  • 4 ARM11 MPCore CPUs with VFP and 32KB L1 caches
  • 1MB of unified L2 cache
  • 2 external multiplexed AXI interfaces
  • CPUs and caches running at 240MHz
  • JTAG connection for processor run control and debug via board below
  • DACs to control CPU’s voltage
  • ADCs to measure power consumption
  • Deliverables

  •  FPGA RTL, synthesis scripts and bit files
  •  Example RTL for Logic Tiles on top of EB
  •  Boot monitor software
          -System Configuration
          -NOR and DiskOnChip Flash utilities
          -Retarget of standard C library
  •  Self Test software
          -Checks that hardware is functional
          -Useful as example peripheral drivers
  • Example software
          -Loading of software from Ethernet or a Multimedia card to Flash
          -Access to PCI system

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