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   Platform Baseboard for Cortex-A8

Platform Baseboard for Cortex-A8

    The ARM® RealView® family of feature-rich development boards provides an excellent environment for prototyping system-on-chip designs. Through a range of plug-in options, hardware and software applications can be developed and debugged.

    The high performance Versatile family enhances the end-user experience for benchmarking and application development. It simplifies hardware and software development, which shortens time to market.

    The Platform Baseboard for Cortex-A8 is a development board especially designed for ARMv7 architecture applications development. Cortex-A8 processor evaluation, Operating System porting and custom peripheral driver development is hence enabled.

Platform Baseboard for Cortex-A8

    The Platform Baseboard for Cortex-A8 features a Cortex-A8 Test Chip with NEON technology and integrated 32K Level 1 and 256K level 2 of cache. A structured ASIC handles the high speed peripherals (DDR DMC, NOR SMC, PCI, AXI bus matrix), a companion Xilinx Virtex-4 FPGA handles the standard I/O peripherals and a debug Xilinx Virtex-5 FPGA implement the CoreSight technology facilitating processor debug and trace.

    The Cortex-A8 Test Chip and the structured ASIC are connected via a non multiplexed 64bit AXI bus to give the highest possible data transfer between the two chips. The platform performance allows software development at near real time.

    Using the Tile and PCI (PCI, PCI Express) connectors, custom peripherals can be added to the system so as to model the final product.

    In order to accelerate software development and reduce time to market the Platform Baseboard is delivered with FPGA bit file and example software. A number of operating systems, including Linux will also be ported to this board to help users accelerate the development of OS-based applications.

Specification
Platform Baseboard Features

  •  Cortex-A8 Test Chip, Structured ASIC Chip
  •  SouthBridgeVirtex-4 XC4VLX40 FPGA
  •  Debug Virtex-5 XC5VLX50T FPGA
  •  512MB DDR SDRAM, 2MB Cellular RAM
  •  128MB NOR Flash
  •  PISMO expansion site (www.pismoworld.org)
  •  Tile Connector
  •  PCI and PCI-Express slots
  •  *Standard frequency: Cortex-A8 Test Chip 750MHz, Internal AXI 100MHz, Expansion AXI 30MHz
  •  PB-A8 is Micro ATX, self-powered, supplied in a case
  • *speed figures subject to change

    Platform Baseboard Peripherals

  • 10/100 Ethernet MAC, High Speed OTG USB v2.0 controller
  •  32-bit 66MHz PCI controller
  •  100MHz 32-bit DDR SDRAM controller
  •  50MHz 32-bit Asynchronous SRAM controller
  •  50MHz 32-bit NOR Flash controller
  •  VGA/DVI, Keyboard and mouse connectors
  •  SmartCard and Multimedia/SD Card controller, Compact Flash Interface
  •  Stereo audio Line in/out and microphone
  •  4 UARTs
  •  Switches, LEDs and GPIO headers
  • Deliverables

  •  Documentation
  •  FPGA bit-file for Companion FPGA
  •  Utility to reprogram the Companion FPGA configuration Flash with RealView ICE or the USB debugger integrated on RealView baseboards
  •  Boot monitor software
          - System Configuration
          - NOR Flash utility
          - Retarget of C I/O libraries
  •  Self Test software
          - Checks that hardware is functional
          - Peripheral driver example
  • Example software
          - Access to PCI system
          - Network Flash Utility
          - Linux Debian 2.6.19 patch, BSP
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